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10-Layer 3-Stage HDI PCB | 3+n+3, 0.10 mm Blind Via - UGPCB

HDI PCB/

10-Layer 3-Stage HDI PCB | 3+N+3 Stackup | 0.10 mm Laser Blind Via

名前: 10-layer 3-stage HDI PCB Layers: 3+N+3 Sheet: FR4 Tg170 Plate thickness: 1.2mm Panel size: 126*118mm/4 Outer copper thickness: 35μm Inner layer copper thickness: 18μm Minimum through hole: 0.20mm Minimum blind hole: 0.10mm Minimum BGA: 0.25mm Line width and spacing: 2.8/3.2ミル

  • 製品詳細

製品の概要: What Is a 10-Layer 3-Stage HDI PCB?

A 10-layer 3-stage HDI PCB is a high-density interconnect printed circuit board. It uses three sequential lamination cycles and three laser drilling steps. The 3+N+3 stackup has three build-up layers on each side. The middle N section contains four core layers. Total layer count is ten. This structure enables high-density routing and reliable signal transmission.

Blind and buried vias in HDI PCB – cross-section showing layer interconnect structures

IPC-2226 defines this 3+N+3 structure as Type III HDI. 注記: Some older sources call 3+N+3 Type II. That label is incorrect. IPC-2226 defines Type III for 3+N+3.

The electronics industry keeps shrinking devices. 伝統的 プリント基板 technology is near its physical limits. HDI technology solves this problem. It packs more routing into less space. 結果として, HDI PCB power modern high-end electronics.

コア仕様

パラメーター仕様
レイヤー数 / ステージ10 レイヤー / 3-ステージ (3+n+3)
基材FR4 TG170 (IPC-4101)
板厚1.2 mm
パネルサイズ126 × 118 mm / 4-上
外側の銅の厚さ35 μm (約. 1 オンス)
内側の銅の厚さ18 μm (約. 0.5 オンス)
最小スルーホール0.20 mm
Minimum blind via0.10 mm
最小BGA0.25 mm
線の幅と間隔2.8/3.2 ミル (0.071/0.081 mm)

Industry Standard Classification: HDI Types Under IPC-2226

IPC-2226 defines HDI types by build-up layers per side.

HDI TypeStackupBuild-Up Layers Per SideIPC-2226 Status
タイプI1+n+11Standard type
タイプII2+n+22Standard type
タイプIII3+n+33Standard type
エリックAny-layer3+Industry term, not an IPC-2226 type

This product is IPC-2226 Type III. It uses 3+N+3. サポートします 0.25 mm BGA pitch. It also supports 0.10 mm blind vias.

Two microvia stacking methods in HDI PCB – stacked via vs staggered via comparison

IPC-T-50M defines a microvia as a blind via with:

  • Diameter ≤ 0.15 mm
  • Aspect ratio ≤ 1:1
  • Depth ≤ 0.25 mm

UGPCB 0.10 mm blind via meets this definition.

Stackup Structure: Engineering Logic of 3+N+3

The 3+N+3 stackup uses three build-up layers on each side. For a 10-layer board, N equals 4. The full stackup is 3+4+3.

  • Outer layers: three signal layers on each side.
  • Middle layers: four core layers.
  • Inner layers: power and ground planes.
10-layer 3-step HDI PCB stack-up – cross-section showing sequential lamination and microvia layers

This arrangement supports high-speed signals and stable power delivery.

Key design points:

  • シグナルインテグリティ: コントロール 50 Ω single-ended impedance. コントロール 90 Ωと 100 Ω differential impedance.
  • Power distribution: Use split power and ground planes. Keep inner copper at 18 μm or higher.
  • Microvia design: Follow IPC-2226. Keep microvia aspect ratio at or below 1:1.
  • BGA fanout: サポート 0.25 mm BGA pitch. This pitch suits advanced packages.

それがどのように機能するか: Microvia Technology for High-Density Interconnect

HDI PCBs use microvias instead of through holes. A microvia connects only the layers that need a connection. This design frees routing space.

UGPCB builds this 10-layer 3-stage HDI PCB in three stages.

  • Stage 1: Laser drills form blind vias between L1-L2 and L9-L10.
  • Stage 2: Laser drills form blind vias between L2-L3 and L8-L9.
  • Stage 3: Laser drills form blind vias between L3-L4 and L7-L8.

Three lamination cycles build all microvia layers. This process creates a true 3D interconnect structure.

Reliability matters. IPC-6012クラス 3 requires a minimum of 20 μm copper in holes. It also requires an average of 25 μm. Plating must reach the bottom of each blind via. Engineers control aspect ratio to prevent voids.

Key Materials and Performance

FR4 Tg170 Base Material

この製品が使用しているのは、 FR4 Tg170 laminate. It meets IPC-4101. Tg means glass transition temperature. Tg170 means the material stays rigid below 170°C.

High-Tg materials offer key benefits:

  • Thermal reliability: Z-axis CTE is about 45–55 ppm/°C below Tg. IPC-4101 sets a maximum of 60 ppm/°C for many high-Tg FR4 grades.
  • はんだ付け性: The material withstands lead-free reflow. Peak temperature reaches about 260°C.
  • 炎の評価: FR4 meets UL94 V-0. It self-extinguishes within 10 秒. It does not produce flaming drips that ignite cotton.
UL 94 V-0 難燃性 PCB 材料の試験要件

銅の厚さ

  • Outer copper: 35 μm, について 1 オンス. It carries current and spreads heat.
  • Inner copper: 18 μm, について 0.5 オンス. It supports fine-line etching.

Line Width and Spacing

ボードは達成します 2.8/3.2 mil line width and spacing. That equals 0.071/0.081 mm. This range falls into fine-line プリント基板設計.

IPC-2221B requires 0.10 mm minimum spacing for external uncoated conductors at 0–15 V. This product’s 3.2 mil spacing is close to that limit. It demands tight etching control and high-precision AOI.

製造工程: From Core to Finished HDI PCB

UGPCB follows a multi-stage sequential lamination process.

Stage 1: コアの製造

The process starts with double-sided copper-clad laminate. Mechanical drilling forms through holes down to 0.20 mm. メッキ, imaging, and etching form inner-layer circuits.

Stage 2: First Build-Up Lamination and Laser Drilling

The team stacks prepreg and copper foil on both sides. A high-temperature press bonds the layers. A UV laser drills 0.10 mm blind vias. Plating fills the vias and forms L1-L2 interconnects.

Stage 3: Second Build-Up Lamination and Laser Drilling

The team repeats lamination, レーザー穴あけ, とメッキ. This step forms L2-L3 interconnects.

Stage 4: Third Build-Up Lamination and Laser Drilling

The team completes the third build-up. This step forms L3-L4 interconnects. All ten layers now have interconnections.

Stage 5: Outer Patterning and Finishing

The process forms outer circuits with 2.8/3.2 mil line width and spacing. Then comes solder mask, 表面仕上げ, and routing. Surface finish options include ENIG, OSP, 鉛フリーHASL. Final checks include AOI, X線, and flying probe testing.

Applications of 10-Layer 3-Stage HDI PCB

5G Communication Equipment

5G smartphones need high routing density. The 10-layer 3-stage HDI PCB supports 0.25 mm BGA and mmWave modules. UGPCB’s HDI PCB solutions serve this market.

AI Servers and High-Performance Computing

AI servers use FPGAs and GPUs with high pin counts. A 10-layer 3-stage HDI PCB provides fine lines and small vias. It supports high-speed interconnects.

カーエレクトロニクス

Advanced driver-assistance systems use radar, リダー, and domain controllers. These systems need high-frequency HDI boards. The 10-layer 3-stage HDI PCB meets that need.

High-End Consumer Electronics

Flagship tablets, ウェアラブル, and imaging devices benefit from HDI technology. They gain thinner designs and better performance.

Why Choose UGPCB for Your 10-Layer 3-Stage HDI PCB?

UGPCB offers high-order HDI mass production. We build 1-stage to 3-stage HDI PCBs and beyond.

We follow IPC standards. Our process covers IPC-2226 design rules and IPC-6012 acceptance criteria.

We use high-quality FR4 Tg170 laminate. The material meets IPC-4101 and UL94 V-0.

We deliver fine-line capability. Our lines reach 2.8/3.2 ミル. Our laser vias reach 0.10 mm.

We provide PCB and PCBA turnkey services. You can source bare boards and full PCBA assembly from one partner.

Get a Quote for Your HDI PCB Project

Need a 10-layer 3-stage HDI PCB quote? Need HDI PCB prototyping? Need PCBA turnkey サービス?

UGPCB のオファー:

  • Free technical review and stackup advice
  • Fast prototyping
  • Flexible volumes from small batch to mass production

連絡先 today. Upload your Gerber files and technical requirements. Our engineers will reply within 24 hours with pricing and technical feedback.

Visit UGPCB’s website to start your HDI PCB order.

Product parameters come from UGPCB’s manufacturing data. Industry process descriptions come from public technical references.

データソース宣言

This article cites the following standards and sources:

  1. IPC-2226, Design Guidelines for High Density Interconnect Structures. Defines HDI Type I, タイプII, およびタイプIII. Defines 3+N+3 as Type III.
  2. IPC-6012, リジッドプリント基板の認定および性能仕様. クラス 3 requires 20 μm minimum and 25 μm average copper in holes.
  3. IPC-4101, リジッド・多層プリント基板用基材仕様. Covers FR4 Tg170 and Z-axis CTE limits.
  4. IPC-2221B, プリント基板設計に関する一般規格. Lists 0.10 mm minimum spacing for external uncoated conductors at 0–15 V.
  5. IPC-T-50M, Terms and Definitions for Interconnecting and Packaging Electronic Circuits. Defines microvia as ≤ 0.15 mm diameter, ≤ 1:1 アスペクト比, and ≤ 0.25 mm depth.
  6. UL 94, Tests for Flammability of Plastic Materials for Parts in Devices and Appliances. UL94V-0 内部で自己消火する必要がある 10 seconds and no flaming drips that ignite cotton.
  7. UGPCB product specification sheet for the 10-layer 3-stage HDI PCB.

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